这篇论文让AI Agent自己找预取器失败原因并造新方案，结果比人类设计的Alecto和Berti还强，值得看看。
论文提出一种性能异常驱动的自动研究流程，通过反复询问预取器失败原因，迭代构建混合预取器MoP。该流程消耗1.91亿DeepSeek V4 Pro tokens，并自动合成多个专用子预取器。在SPEC CPU2006和SPEC CPU2017上，MoP相比无预取实现61.1%的几何平均IPC加速。相比人类设计的Alecto、Berti和Pythia，MoP分别高出14.5%、21.6%和23.6%。RTL综合显示其占用110KB存储和0.0347平方毫米面积。
Why Do Prefetchers Fail? Let Agents Answer
Hardware prefetchers are crucial to processor performance, yet their design remains labor-intensive and expert-driven. Architects inspect execution and memory-access traces, identify patterns, translate them into online hardware heuristics, and evaluate them in simulation, often with no guarantee of improvement. Human experts cannot systematically inspect billion-instruction traces across diverse real-world workloads. We present a performance-anomaly-driven autoresearch flow that repeatedly asks why a deployed prefetcher fails and uses the diagnoses to construct the Mixture of Prefetchers (MoP). Each iteration localizes high-impact unexplained misses to program counters, gives agents hardware logs, source code, and sliced traces, validates diagnoses through runnable minimal cases, and synthesizes specialized sub-prefetchers for recurring pattern families. Measured performance and remaining anomalies feed subsequent iterations, enabling simulator-in-the-loop discovery beyond model priors. The campaign consumes 1.91 billion DeepSeek V4 Pro tokens. On SPEC CPU2006 and SPEC CPU2017, MoP achieves a 61.1% geomean IPC speedup over no prefetching, outperforming the human-designed Alecto, Berti, and Pythia prefetchers by 14.5%, 21.6%, and 23.6%, respectively. RTL synthesis in a 6nm library reports 110 KB of on-chip storage and 0.0347 mm^2 area. To our knowledge, this is the first empirical demonstration that an agent-driven hardware-design process can produce an RTL-practical prefetcher that outperforms state-of-the-art human designs on unseen workloads.