AutoTrans Framework for RISC-V Security Assertions
AutoTrans reduces hardware security verification time from hours to minutes per assertion, making it valuable for RISC-V developers in ASEAN.
AutoTrans reduces hardware security verification time from hours to minutes per assertion, making it valuable for RISC-V developers in ASEAN.
这篇论文把 chiplet 和 LLM 两个热点合在一起聊硬件安全,既有攻击面分析也有防御方案,做芯片安全的值得看看。
用GPT-4.1给硬件RTL自动生成安全断言,Hack@DAC'21上89%能跑通,还抓到一个新bug,做芯片安全的值得看。